Spirent and Synopsys Collaborate to Accelerate Silicon Development to Market

Spirent Communications plc, a provider of test, assurance and analytics solutions for next-generation devices and networks, announced its collaboration with Synopsys to provide a network system-on-chip (SoC) verification solution to bridge the gap between pre- and post-verification of silicon.

The Spirent Chip Design Verification solution accelerates the entire silicon development lifecycle and delivers significant cost savings by identifying and resolving issues during the IC design phase and before manufacturing begins. The combination of network test technology from the leading Ethernet test company with a state-of-the-art emulation system enables more accurate and faster verification of Ethernet SoCs.

Spirent’s TestCenter platform is a network traffic generator, providing automated, scalable, and accurate Ethernet test patterns that are a necessity for network ASIC and SoC verification engineers. It is tightly integrated with Synopsys ZeBu Server, a leading emulation system, enabling pre-silicon SoC validation from 1G to 800G. The integration between the traffic generator and the ZeBu server is synchronized in time, which allows accurate and realistic layer 2-3 traffic generation and analysis of the results in real time.

Chip Design Verification Solution

“Given the breadth of our test solutions, we value partnering with EDA vendors to bridge the gap between pre- and post-silicon validation of next-generation networking products,” said Malathi. Malla, head of go-to-market strategy and cloud and IP operations. at Spirit Communications. “Together with Synopsys, we provide access to the latest chip design verification solution that enables our customers to identify critical issues early in the design lifecycle and accelerate their time to market. Customers are able to simplify testing complexity, reduce development time, and ensure new products perform as intended.

Using the Spirent Chip Design Verification Solution in all phases of the chipset ecosystem provides:

  1. Improve operational efficiency and flexibility using virtualized testbeds
  2. Reduce network testing complexity with actionable analytics and intuitive reporting
  3. Automation and reusability of test setups between pre- and post-silicon teams

“By collaborating with leaders in test solutions, we enable networking companies to optimize the time to revenue for new networking SoCs,” said Susheel Tadikonda, vice president of engineering solutions within the Synopsys verification group. “We are delighted to partner with Spirent to provide innovative and comprehensive virtual test solutions based on the high performance ZeBu emulation systems and Spirent TestCenter platform to perform pre- and post-silicon validation.”